Cache memory system and control method of the cach

专利名称：Cache memory system and control method

of the cache memory system

发明人：Nobuyuki Harada申请号：US11162509申请日：20050913公开号：US07493445B2公开日：20090217

专利附图：

摘要：To improve the efficiency of access to a system memory associated withchanges (writes) to cache data, a cache line having the same memory size as write data isselected and the write data is written into the selected cache line, thereby reducing the

number of accesses to the system memory to cache data from the system memoryassociated with partial replacement of cache lines. Further, valid data at an addresscontiguous with the address of the write data is combined with the write data, and writteninto a cache line having the same size as the combined data, thereby reducing the numberof accesses to the system memory to flush data from the cache associated with writes tothe cache.

申请人：Nobuyuki Harada

地址：Kanagawa-ken JP

国籍：JP

代理人：Michael LeStrange

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